CERN Accelerating science

CERN-wide meetings, trainings and events

Ultimi arrivi:
2024-06-17
14:02
Panel 2 / minwalla, shiraz (speaker) ; Armas, Jácome (speaker) ; Maldacena, Juan (speaker) ; Valenzuela Agui, Irene (speaker) (CERN) ; Vafa, C. (speaker)
2024 - 0:59:12. CERN70 Public Events at CERN; The case of the (still) mysterious Universe External links: Talk details; Event details In : The case of the (still) mysterious Universe

Record dettagliato - Record simili
2024-06-17
12:30
Panel 1 / Domcke, Valerie (speaker) (CERN) ; Armas, Jácome (speaker) ; Gross, David (speaker) ; Grojean, Christophe (speaker) (DESY (Hamburg), Humboldt University (Berlin) and CERN) ; Strominger, Andrew (speaker)
2024 - 0:55:12. CERN70 Public Events at CERN; The case of the (still) mysterious Universe External links: Talk details; Event details In : The case of the (still) mysterious Universe

Record dettagliato - Record simili
2024-06-14
17:03
Convenient and reliable clock domain crossings, using scoped constraints and reusable blocks / Vik, Lukas (speaker) (Freelance)
Despite being used regularly by all FPGA designers, very few people know how to properly and reliably constrain a clock domain crossing (CDC). Timing constraints are indeed one of the hardest parts of FPGA design. [...]
2024 - 0:44:09. FPGA Developers' Forum (FDF); 1st FPGA Developers' Forum (FDF) meeting External links: Talk details; Event details In : 1st FPGA Developers' Forum (FDF) meeting

Record dettagliato - Record simili
2024-06-14
16:15
The BondMachine Project / Mariotti, Mirko (speaker) (Universita e INFN, Perugia (IT)) ; Mariotti, Mirko (speaker) (Universita e INFN, Perugia (IT))
Since 2017 we started R&D; on framework development for co-designing (HW/SW) computational systems, targeting mainly FPGAs. The main innovation of the project, named BondMachine (BM), is the creation of a new type of architecture, dynamically adapted to the specific problem [...]
2024 - 0:39:11. FPGA Developers' Forum (FDF); 1st FPGA Developers' Forum (FDF) meeting External links: Talk details; Event details In : 1st FPGA Developers' Forum (FDF) meeting

Record dettagliato - Record simili
2024-06-14
16:15
CERN control group cores and tools / Gingold, Tristan (speaker) (CERN)
The CERN control group (in particular the BE-CEM-EDL section, previously BE-CO-HT) is at the origin of the White Rabbit technology. But in addition to this well known project, the section has also developed a set of generic cores (named general-cores), a tool to automatically build project for simulators and synthesizers starting from a python description (hdlmake), as well as a tool to generate HDL, header files and documentation from a register map (Cheby). I will present how we develop designs using those tools and library..
2024 - 0:33:59. FPGA Developers' Forum (FDF); 1st FPGA Developers' Forum (FDF) meeting External links: Talk details; Event details In : 1st FPGA Developers' Forum (FDF) meeting

Record dettagliato - Record simili
2024-06-14
16:15
Best practices to open-source FPGA designs / Serrano, Javier (speaker) (CERN)
Open Source revolutionised software development by promoting collaboration, innovation, and openness. As FPGA designers, you can leverage this approach and share your HDL designs with the world. In this presentation, we will discuss a step-by-step process to help you open-source your HDL designs effectively. [...]
2024 - 0:47:47. FPGA Developers' Forum (FDF); 1st FPGA Developers' Forum (FDF) meeting External links: Talk details; Event details In : 1st FPGA Developers' Forum (FDF) meeting

Record dettagliato - Record simili
2024-06-14
15:52
Welcome to CERN / Gousiou, Evangelia (speaker) (CERN)
What to do next? Where to go?
2024 - 0:16:01. FPGA Developers' Forum (FDF); 1st FPGA Developers' Forum (FDF) meeting External links: Talk details; Event details In : 1st FPGA Developers' Forum (FDF) meeting

Record dettagliato - Record simili
2024-06-12
14:48
COLIBRI: Towards a CERN-wide common cores library / Perro, Alberto (speaker) (Universite d'Aix-Marseille III (FR))
In modern Data Acquisition (DAQ) gateware, developers use many basic parts to make custom features. These parts come from vendors or are made by developers themselves. [...]
2024 - 0:19:09. FPGA Developers' Forum (FDF); 1st FPGA Developers' Forum (FDF) meeting External links: Talk details; Event details In : 1st FPGA Developers' Forum (FDF) meeting

Record dettagliato - Record simili
2024-06-12
12:32
Musical Performance 2 / Vicinanza, Domenico (speaker)
2024 - 0:25:39. CERN70 Public Events at CERN; The case of the (still) mysterious Universe External links: Talk details; Event details In : The case of the (still) mysterious Universe

Record dettagliato - Record simili
2024-06-12
12:32
Musical Performance 1 / Vicinanza, Domenico (speaker)
2024 - 0:16:34. CERN70 Public Events at CERN; The case of the (still) mysterious Universe External links: Talk details; Event details In : The case of the (still) mysterious Universe

Record dettagliato - Record simili