| 主页 > CERN Experiments > LHC Experiments > ATLAS > ATLAS Preprints > An FPGA based topological processor prototype for the ATLAS Level-1 trigger upgrade > BibTeX |
@techreport{Bauss:1490584,
author = "Bauss, B and Buescher, V and Degele, R and Ji, W and
Moritz, S and Reiss, A and Schaefer, U and Simioni, E and
Tapprogge, S and Wenzel, V",
title = "{An FPGA based topological processor prototype for the
ATLAS Level-1 trigger upgrade}",
institution = "CERN",
reportNumber = "ATL-DAQ-PROC-2012-056",
address = "Geneva",
year = "2012",
url = "https://cds.cern.ch/record/1490584",
}