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RD53 Papers

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RD53A Integrated Circuit Specifications / Garcia-Sciveres, Mauricio (Lawrence Berkeley National Lab. (US)) /RD53 Collaboration
Specifications for the RD53 collaboration’s first engineering wafer run of an integrated circuit (IC) for hybrid pixel detector readout, called RD53A. RD53A is intended to demonstrate in a large format IC the suitability of the technology (including radiation tolerance), the stable low threshold operation, and the high hit and trigger rate capabilities, required for HL-LHC upgrades of ATLAS and CMS. [...]
CERN-RD53-PUB-15-001.- Geneva : CERN, 2015 - 18. GDS file: GDS; RD53A chip specifications: PDF; Surface features: PDF; read me : TXT;

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The RD53 Collaboration's SystemVerilog-UVM Simulation Framework and its General Applicability to Design of Advanced Pixel Readout Chips / Marconi, S. (CERN ; INFN, Perugia ; Perugia U.) ; Conti, E. (Perugia U. ; INFN, Padua) ; Placidi, P. (Perugia U. ; INFN, Perugia) ; Christiansen, J. (CERN) ; Hemperek, T. (Bonn U.)
The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). [...]
CERN-RD53-PUB-14-001; arXiv:1408.3232.- Geneva : CERN, 2014 - 15 p. - Published in : J. Instrum. 9 (2014) P10005 Fulltext: arXiv:1408.3232 - PDF; AIDA-PUB-2014-019 - PDF; IOP Open Access article: PDF; External link: Preprint

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