| Article | |
| Title | A radiation-hard PLL for frequency multiplication with programmable input clock and phase-selectable output signals in 130 nm CMOS |
| Author(s) | Poltorak, K (CERN) ; Moreira, P (CERN) ; Tavernier, F (CERN) |
| Publication | 2012 |
| Note | Topical Workshop on Electronics for Particle Physics, Oxford, ENGLAND, SEP 17-21, 2012 |
| In: | JINST 7 (2012) C12014 |
| In: | Topical Workshop on Electronics for Particle Physics, Oxford, UK, 17 - 21 Sep 2012, pp.C12014 |
| DOI | 10.1088/1748-0221/7/12/C12014 |
| Subject category | Detectors and Experimental Techniques |
| Abstract | A PLL (ePLL) is presented that is intended to be used as a frequency multiplier. The ePLL accepts 40, 80, 160 or 320 MHz as a reference and generates clocks at the same frequencies, regardless of the input clock. Moreover, the outputs are available with a phase resolution of 90 degrees for the 40, 80 and 160 MHz output and 22.5 degrees for the 320 MHz output. The radiation-hard design, integrated in a 130 nm CMOS technology, is able to operate at a supply voltage between 1.2V and 1.5V. |
| Copyright/License | Publication: (License: CC-BY-3.0) |
记录创建於2013-11-18，最後更新在2017-05-24
